cMIPS – a Pedagogical Tool for Studying Architecture
DOI:
https://doi.org/10.5753/ijcae.2013.4949Abstract
We present cMIPS, our VHDL implementation of the MIPS processor. Its use is proposed as an integrative platform for teaching Computer Architecture and related subjects. We show how the complete platform, which includes the processor and some simple peripherals, can facilitate the appropriation of the core concepts and their interrelationships. cMIPS is a model of the five-stage pipeline of the MIPS32 instruction set.
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References
D. A. Patterson and J. L. Hennessy, Computer Organization & Design: The Hardware/Software Interface, 4th ed. Morgan Kaufmann, 2009, iSBN 9780123744937.
M. Technologies, “MIPS32 architecture for programmers, volume II: The MIPS32 instruction set,” MIPS Technologies, Inc, Rev. 2.50, 2005.
D. E. Comer, Operating System Design – The XINU Approach. Prentice-Hall, 1988, vol. 1, iSBN 0136381804.
D. Sweetman, See MIPS Run – Linux, 2nd ed. Morgan Kaufmann, 2007, iSBN 0120884216.
M. Technologies, “MIPS32 architecture for programmers, volume III: The MIPS32 privileged resource architecture,” MIPS Technologies, Inc, Rev. 2.50, 2005.
R. Stallman et al., “GCC, the GNU Compiler Collection,” Free Software Foundation, Páginas html, 1999, disponível em [link]. Acesso em 28/7/2013.
——, “GNU Binutils,” Free Software Foundation, Páginas html, 1998, disponível em [link]. Acesso em 28/7/2013.
R. A. Hexsel and R. Carmo, “Ensino de Arquitetura de Computadores com enfoque na interface hardware/software,” in WEAC’06: Workshop sobre Educação em Arquitetura de Computadores, 2006, pp. 9–16.
N. Calazans and F. Moraes, “Simulação VHDL do processador MRStd,” Faculdade de Informática, PUC-RS, Páginas html, 2006, disponível em [link]. Acesso em 8/5/2012.
S. Hangouët, S. Jan, L.-M. Mouton, and O. Schneider, “miniMIPS,” Opencores.org, Páginas html, 2009, disponível em [link]. Acesso em 02/08/2013.
J. T. Júnior and R. A. Hexsel, “MPSoC minimalista com caches coerentes implementado num FPGA,” in WSCAD-SSC’ 09: X Workshop em Sistemas Computacionais de Alto Desempenho, Oct 2009, pp. 1–8.
G. Ayers, “MIPS32 Release 1,” Opencores.org, Páginas html, 2012, disponível em [link]. Acesso em 02/08/2013.
S. Rhoads, “Plasma - most MIPS I opcodes,” Open-cores.org, Páginas html, 2001, disponível em [link]. Acesso em 21/09/2013.
T. Austin, E. Larson, and D. Ernst, “SimpleScalar: An infrastructure for computer system modeling,” Computer, vol. 35, no. 2, pp. 59–67, 2002.
R. Azevedo, S. Rigo, M. Bartholomeu, G. Araujo, C. Araujo, and E. Barros, “The ArchC architecture description language and tools,” Int Journal of Parallel Programming, vol. 33, no. 5, pp. 453–484, Oct 2005.
T. Wolf and M. A. Franklin, “CommBench – a telecommunications benchmark for network processors,” in Proc IEEE Int Symp on Performance Analysis of Systems and Software (ISPASS), Apr 2000, pp. 154–162.
M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge, and R. B. Brown, “MiBench: A free, commercially representative embedded benchmark suite,” in Proc Int Workshop on Workload Characterization (WWC-4), 2001, pp. 3–14.
T. Gingold, “GHDL – G Hardware Design Language,” 2012, disponível em [link]. Acesso em 11/7/2012.
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