FERREIRA, R.; FONTES, G. Teaching Memory Organizations in Parallel Architectures Using Graphics Accelerator Boards. International Journal of Computer Architecture Education, [S. l.], v. 2, n. 1, p. 17–20, 2013. DOI: 10.5753/ijcae.2013.4945. Disponível em: https://journals-sol.sbc.org.br/index.php/ijcae/article/view/4945. Acesso em: 25 dec. 2024.