A Teaching Methodology Based On The ALU 8bit RISC Design VLSI Full Custom for Classes on Computer Architecture and Digital Electronic
DOI:
https://doi.org/10.5753/ijcae.2013.4948Keywords:
Pedagogical Interstices, Arithmetic Logic Unit, VLSI, Integrated circuit, Teaching-learningAbstract
This work presents a teaching methodology for the design and simulation of digital circuits, focusing on an 8-bit Arithmetic Logic Unit (ALU) using IBM 7WL SiGe BiCMOS 180nm VLSI Full-Custom technology and the LTSpice 4 tool, under GNU license. The ALU was designed to perform arithmetic operations such as addition, subtraction, and greater than, less than, and equality comparisons, as well as logical operations like AND and OR bitwise. Simulation results showed the functionality of the proposed architecture, with a maximum response delay of about 1ns. The methodology was successfully implemented in courses such as Computer Architecture, Computer Organization, Digital Circuits, Microprocessors and Microcontrollers II, and Digital Electronics and VLSI Design II for Electrical Engineering, highlighting a rich experience for students in studying and developing this central element (ALU) in computer architecture.
Downloads
References
J. Djordjevic, B. Nikolic, and A. Milenkovic. "Flexible Web-Based Educational System for Teaching Computer Architecture and Organization". IEEE Transaction On Education, Vol. 48, No. 2, pp. 264-274. May 2005.
A. M. De Oliveira, H. D. O. Ascama, and S. T. Kofuji. "Unidade Lógico-Aritmética com Arquitetura Risc de 8bits Projetada na Tecnologia CMOS 350nm para Aplicações na Educação na Engenharia e na Ciência da Computação". Journal of the Federal Institute of São Paulo (SINERGIA), Vol. 14, No. 1, pp. 28-38. apr 2013.
E. Fregni, A. M. Saraiva. "Engenharia do projeto logico digital: conceitos e pratica. São Paulo: E. Blucher. 1995.
R. J. Tocci,N. S. Widmer, and G. L. Moss. Sistemas digitais: princípios e aplicações. 10. ed. São Paulo: Prentice Hall, 2007.
M. Suzuki, et al. "A 1.5ns 32b CMOS ALU in Double Pass-Transistor Logic". IEEE International Solid-State Circuits Conference, Session 5, p. 90-91, 1993.
D. A. Patterson, J. L. Hennessy. "Computer organization and design: the hardware/software interface". 3. ed. Boston: Morgan Kaufmann Publishers, 2005.
G. G. Langdon, E. Fregni. Projeto de computadores digitais. São Paulo: E. Blucher, 1987.
D. Patti, et al. "Supporting Undergraduate Computer Architecture Students Using a Visual MIPS64 CPU Simulator". IEEE Transaction on Education. Vol. 55, n. 3, pp. 406-411, May 2012.
Y. Linn. "An Ultra Low Cost Wireless Communications Laboratory for Education and Research". IEEE Transaction on Education. Vol. 55, n. 2, pp. 169-179, May 2012.
M. Da G. N. Mizukami. “Ensino: as abordagens do processo”. São Paulo: EPU, 1986.
S. Hall. “A Centralidade da Cultura: notas sobre as revoluções culturais de nosso tempo”. Educação & Realidade, Porto Alegre, v. 22, n. 2, p. 15-46, jul./dez. 1997.
P. Freire. Pedagogia do Oprimido. 9 ed. Rio de Janeiro: Editora Paz e Terra, 1981.
J. L. Güntzel. "Projeto de um unidade lógico-aritmética (ULA)". Universidade Federal de Pelotas. Pelotas, 2003.
C. Srinivasan. Arithmetic Logic Unit (ALU) design using reconfigurable CMOS logic. 2003. Dissertação (Mestrado de Ciências em Engenharia Elétrica). Louisiana State University and Agricultural and Mechanical College, Louisiana, 2003.
D. RADHAKRISHNAN, "Design of CMOS circuits". IEE Proceedings-G. UK: Stevenage. Vol. 138, n. 1, p. 83-90, fev. 1991.
D. RADHAKRISHNAN, "Switching activity in CMOS pass networks". IEE Electronics Letters Online, UK: Stevenage. Vol. 35, n. 24, p. 2115-2116, nov. 1999.
D. RADHAKRISHNAN, S. R. WHITAKER, G. K. MAKI. "Formal Design Procedures for Pass Transistor Switching Circuits". IEEE Journal of Solid-State Circuits. Vol. SC-20, n. 2, p. 531-536, apr. 1985.
P. KUDVA, et al. "Synthesis of Hazard-free Customized CMOS Complex-Gate Networks Under Multiple-Input Changes". IB T.J. Watson Research Center. 1996.
J. A. Abraham. "Implementing Logic in CMOS". Notas de aula. Departament of Electrical and Computer Enginnering at The University of Texas, Austin, set. 2010.
Sindicato das Entidades Mantenedoras de Estabelecimentos de Ensino Superior no Estado de São Paulo. “Mapa do Ensino Superior no Estado de São Paulo”, 2012.
Downloads
Published
How to Cite
Issue
Section
License
Copyright (c) 2013 Os autores
This work is licensed under a Creative Commons Attribution 4.0 International License.
