A Double-Phase Evolvable Hardware Architecture Learning Platform: Design, Simulation, and Prototyping Testbed
DOI:
https://doi.org/10.5753/ijcae.2022.4835Abstract
The world is changing. Scientists and engineers create solutions for daily problems every day. Time is a crucial factor in many contexts, for example, academia. Undergraduate, master, or doctorate tasks in engineering and computer science tend to use enhanced methods that are computationally expensive for regular computers. It is the case of Hardware development. When a research issue deals with complex and multidisciplinary topics, like Evolvable Hardware, things become even worse. In this case, students and researchers spend a huge amount of time prototyping and making experiments in traditional EDA tools. This work shows the initial results of a double-phase evolvable hardware design learning platform, a combination of a computational interface for logic simulation and hardware prototyping.
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Pauline C Haddow and Andy M Tyrrell. Challenges of evolvable hardware: past, present and the path to a promising future. Genetic Programming and Evolvable Machines, 12:183–215, 2011.
M A Almeida and E C Pedrino. Hybrid evolvable hardware for automatic generation of image filters. INTEGRATED COMPUTER-AIDED ENGINEERING, 25:289–303, 2018.
Rui Yao, Ping Zhu, Junjie Du, Meiqun Wang, and Zhaihe Zhou. A general low-cost fast hybrid reconfiguration architecture for fpga-based self-adaptive system. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, E101D:616–626, 3 2018.
Lukas Sekanina. Evolutionary hardware design. volume 8067. SPIE-INT SOC OPTICAL ENGINEERING, 2011. Conference on VLSI Circuits and Systems V, Prague, CZECH REPUBLIC, APR¡br/¿18-20, 2011.
Wang Jin and Chong-Ho Lee. Virtual reconfigurable architecture for evolving combinational logic circuits. JOURNAL OF CENTRAL SOUTH UNIVERSITY, 21:1862–1870, 2014.
Derek Whitley, Jason Yoder, and Nicklas Carpenter. Intrinsic evolution of analog circuits using field programmable gate arrays. Artificial Life, 28(4):499–516, 2022.
M Lovay, G Peretti, and E Romero. Implementation of an adaptive filter using an evolvable hardware strategy. IEEE LATIN AMERICA TRANSACTIONS, 13:927–934, 2015.
D Grochol, L Sekanina, M Zadnik, J Korenek, and V Kosar. Evolutionary circuit design for fast fpga-based classification of network application protocols. APPLIED SOFT COMPUTING, 38:933–941, 1 2016.
Phil Husbands, Yoonsik Shim, Michael Garvie, Alex Dewar, Norbert Domcsek, Paul Graham, James Knight, Thomas Nowotny, and Andrew Philippides. Recent advances in evolutionary and bio-inspired adaptive robotics: Exploiting embodied dynamics. Applied Intelligence, 51(9):6467–6496, 2021.
William B Langdon. Genetic programming and evolvable machines at 20. Genetic Programming and Evolvable Machines, 21(1):205–217, 2020.
F Cancare, S Bhandari, D B Bartolini, M Carminati, and M D Santambrogio. A bird’s eye view of fpga-based evolvable hardware. pages 169–175, 2011.
X Yao and T Higuchi. Promises and challenges of evolvable hardware. IEEE Transactions on Systems, Man and Cybernetics, Part C (Applications and Reviews), 29:87–97, 1999.
Lucas Augusto Müller de Souza, José Eduardo Henriques da Silva, Luciano Jerez Chaves, and Heder Soares Bernardino. A benchmark suite for designing combinational logic circuits via metaheuristics. Applied Soft Computing, 91:106246, 2020.
Ju-Hwan Kim, Ho-Jun Lee, Sang-Ho Kim, and Jeong-Oog Lee. A problem solving environment portal for multidisciplinary design optimization. ADVANCES IN ENGINEERING SOFTWARE, 40:623–629, 2009.
Gyongyver Molnar and Bello Csapo. Exploration and learning strategies in an interactive problem-solving environment at the beginning of higher education studies. pages 283–292. IKAM-INST KNOWLEDGE ASSET MANAGEMENT, 2017. 12th International Forum on Knowledge Asset Dynamics (IFKAD), St.¡br/¿Petersbur, RUSSIA, JUN 07-09, 2017.
M H Eres, G E Pound, Z Jian, J L Wason, F L Xu, A J Keane, and S J Cox. Implementation and utilisation of a grid-enabled problem solving environment in matlab. FUTURE GENERATION COMPUTER SYSTEMS, 21:920–929, 6 2005.